The integration of semiconductor devices such as a microcomputer has been increased to have more functions and more elements formed at a higher density. The number of terminals to the external circuits has been rapidly increased, and the circuit wiring conductors become complicated. Therefore, the wire-bonding type connection in which the bonding pads provided on the periphery of each semiconductor chip are connected to the external circuits by wire bonding has already reached its limit. In addition, since the wire-bonding type connection forces the internal wiring conductors to run about up to the peripheral bonding pads, the lengths of the wiring conductors are increased, making the signal transmission slow down. Thus, this type of connection is not suited to the mounting of the logic LSI that needs high-speed operation. For the above reasons, how to much reduce the internal connection regions is the key. In this respect, the flip-chip type connection is a promising technique capable of limiting the connection regions to the top of the chip. Since this flip-chip connection enables the terminals to be provided not only on the periphery of the chip but also on the internal regions thereof, the number of pins of the chip can be increased. In addition, since the flip-chip type allows the wiring conductors on the chip to be short as compared with the wire-bonding type, the operation speed of the logic LSI can be increased.
A conventional method for flip-chip type connection by providing pyramidal bump electrodes on chips is disclosed in JP-A-6-268201.
In the conventional flip-chip type connection by the projected bump electrodes formed on chips, the cut-off separated semiconductor chips themselves are placed under severe conditions of photolithographic process, multi-layer metalization process and heat treatment process for melting solder. In addition, since it takes a long time to finish these processes, some of the separated good chips are defective under the severe conditions or the yield of good chips is reduced by misoperation. The need of these processes increases the production cost because these processes reduce the productivity and do not lead to economy. That is, in the conventional method for mounting by use of the projected bump electrodes formed on the semiconductor chips that are cut off from a wafer, the good semiconductor chips are placed several times under severe conditions, and many different processes that take a long time follow, complicating the production process. This results in the reduction of the yield. In addition, when the projected bump electrodes are formed by melting solder in this conventional method, the heights of the electrodes are so irregular that some electrodes cannot be connected to the conductor pads on the substrate.
It is an object of the invention to provide a semiconductor device capable of high-density mounting without causing any defective conduction at the time of connecting to the substrate, and a mounting structure thereof.
It is another object of the invention to provide a semiconductor device for facilitating high-density mounting at low cost without causing any defective conduction at the time of connecting to the substrate, and a mounting structure thereof.
It is still another object of the invention to provide a method of producing a semiconductor device at low cost by connecting novel projected bump electrodes onto the pad electrodes of the semiconductor chip with the production process simplified.